astribank_hexload − Xorcom Astribank (xpp) firmware loader
astribank_hexload −D device-path −F [options] hexfile
astribank_hexload −D device-path −p [options] hexfile1 .. hexfile4
astribank_hexload −D device-path −O [-A] [-S span-specs] [options] imagefile
astribank_hexload −D device-path −o [options]
astribank_hexload −D device-path −E [options] hexfile
astribank_hexload is a second-stage firmware loader for Xorcom Astribanks.
Note that some very old models use fpga_load(8) instead. This legacy tool hasn’t been used for several releases. It can be found in version 2.6 and below of dahdi-tools.
The astribank_hexload(8) program is used to load a file in the Intel HEX format into a Xorcom Astribank. It can be used to load either an FPGA firmware or a PIC firmware. It is normally run by the script xpp_fxloader.
Required. The device to read from/write to. This is bus_num/device_num, where bus_num and device_num are the first two numbers in the output of lsusb(8) or dahdi_hardware(8). On older versions of this tool you needed a complete path to the device, which would be /dev/bus/usb/bus_num/device_num, or /proc/bus/usb/bus_num/device_num.
One of the following is required:
The firmware to load is a FPGA firmware.
The firmwares to load is are PIC firmwares. All (typically 4) should be on the command-line.
The firmware to load is an Octasic echo canceller firmware image file.
Don’t load firmware. Just print the version number of the currently-loaded Octasic echo canceller firmware.
The firmware to load is a special EEPROM burning one.
Increase verbosity. May be used multiple times.
Set debug mask to mask. Default is 0, 0xFF is "everything".
Displays usage message.
When loading a Octasic echo canceller firmware, set the channels of the first Astribank module to use aLaw (G.711a). This is what you’d normally use for BRI and E1. If not set, the default mu-Law (G.711u), which is what you’d normally use for FXS, FXO and T1.
This option should only be used when loading Octasic echo canceller firmware and only if the first Astribank module is PRI.
Its goal is to allow specifying different line-mode (E1/T1/J1) in different ports of the PRI module. astribank_hexload use the span-specs argument to select aLaw/uLaw for each of the PRI ports in the module.
The span-specs is a list of items separated by whitespace or commas. Each item is composed of a port selector, colon and a line-mode specifier. This syntax follows the syntax of specifiers in /etc/dahdi/span-types.conf.
3:E1 − The 3’rd port is E1.
*:T1 − Any unspecified port is T1 (wildcard match).
1:T1,2:T1,*:E1 − First and second ports are T1, the rest are E1.
If the −S is not given, the PRI default is determined by the existance of the −A-fR option.
fxload(8), lsusb(8), astribank_tool(8)
This manual page was written by Tzafrir Cohen <email@example.com> . Permission is granted to copy, distribute and/or modify this document under the terms of the GNU General Public License, Version 2 any later version published by the Free Software Foundation.
On Debian systems, the complete text of the GNU General Public License can be found in /usr/share/common−licenses/GPL.